(a) Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same.
(b) Description of the Related Art
Generally, in a silicon oxide insulator (SOI) device, a transistor is formed on an SOI wafer by using a complimentary metal oxide semiconductor (CMOS) process. The SOI device is used for a high performance semiconductor device. The SOI wafer is a wafer wherein an insulation layer and a silicon single-crystal layer are accumulated on a silicon single-crystal substrate. In the SOI wafer, a thin insulation layer is formed between a wafer surface wherein circuits are formed and a silicon single-crystal substrate, so a parasitic capacitance can be reduced. In addition, the operation speed of the SOI device can be enhanced, and the operating voltage thereof can be lowered.
However, the SOI wafer is difficult to manufacture, so the manufacturing cost thereof is high. In addition, the silicon single-crystal layer may be very thin, so the resistance of a source/drain region may be very high.
Therefore, an SOI device and a manufacturing method thereof that can lower the parasitic resistance of a source/drain region and suppress a short channel effect are required.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form part of the prior art with respect to the present invention.